A Functional Data-flow Architecture dedicated to Real-time Image Processing, Jocelyn Sérot, Georges M. Quénot and Bertrand Zavidovique, IFIP WG10.3 Working Conference on Architectures and Compilation techniques for fine and medium grain parallelism, pages 129-140, Orlando, FL, USA, 20-22 January 1993.

This paper presents a dataflow computer developed at the ETCA and dedicated to real-time image processing. Two types of data-driven processing elements, dedicated respectively to low and mid-level processings are integrated in a regular 3D array. Its design relies on a close integration of the data-flow architecture principles and the functional programming concept.
An image processing algorithm, first expressed using an FP-like functional syntax is converted into a Data-flow Graph in which the nodes are real time operators implementable on the physical processors of the data-flow machine. This data-flow graph is then directly mapped onto the processor array.
The programming environment includes a complete FP-specification to network configuration compilation stream along with a global operator database.
An experimental system, including 1024 low-level custom data-flow processors 6 x 25 MBytes/s, 50 million operations per second) and 3 T800 transputers, was built and several image processing algorithms were run in real-time at digital video speed.