The Field-Programmable Operator Array (FPOA) is a very coarse grain Field-Programmable Device designed to implement a wide range of low- to mid-level image processing operators. An FPOA contains 2 basic blocks; each basic block includes a configurable datapath (containing 8/16-bit data-flow operators and a 256$\times$9 RAM), a configurable controller and six 10-bit-wide I/O ports. The Data-Flow Functional Computer emulator contains 512 FPOAs in an 8$\times$8$\times$8 array and is aimed at rapid prototyping of real-time vision automata. This paper presents a methodology for retargeting Field-Programmable Operator Array based designs into VLSI circuits consisting of standard cells and datapath (compiler) cells. The retargeting process is highly facilitated by the 8/16-bit operator-level granularity of the FPOA; it includes removal of the unused resources and optimization of the remaining resources. A retargeted extraction macro (edge detection an computing of their directions) is presented.